SEMI 3D7 - Guide for Alignment Mark for 3DS-IC Process
Photo alignment mark configuration is the key to ensure consistent and precise alignment of layers, chips and wafers. Therefore, this Guide provides the alignment mark strategy for chip to chip, chip to wafer, and wafer to wafer stacking. This Guide also addresses the universal alignment mark where the outcome will be a feasible photo alignment standard.
Define and develop lithography alignment strategy for C2C, C2W and W2W stacking. The alignment mark is preferable to be implemented at frontside final metal and/or backside metal layer masking. This Guide addresses universal alignment mark, including shape, dimension, and location. The outcome of a feasible photo alignment standard will be critical to the C2C, C2W and W2W stacking.
Referenced SEMI Standards
SEMI M20 — Practice for Establishing a Wafer Coordinate System
SEMI MS1 — Guide to Specifying Wafer-Wafer Bonding Alignment Targets