SEMI 3D13 - Guide for Measuring Voids in Bonded Wafer Stacks

Volume(s): 3D-IC
Language: English
Type: Single Standards Download (.pdf)
Abstract

This Standard was technically approved by the 3DS-IC Global Technical Committee. This edition was approved for publication by the global Audits and Reviews Subcommittee on January 5, 2015. Available at www.semiviews.org and www.semi.org in July 2015.

 

This Guide will assist users in selection and use of bond-void metrology equipment and a protocol for performing bond-void measurements based on their application. New bonding processes and applications are sensitive to significantly smaller voids than bonding processes currently used for 3DS-IC package sealing.

 

This Guide is based on experimental data on 300-mm diameter silicon wafer pairs. The inspection and metrology tools covered include only commercial instruments available in the 2012–2014 time frame. The wafer bonding technique used was oxide bonding. The experimental data were provided by volunteer participants in this study and have not been independently verified.

 

This Guide covers the purpose and results of the experimental study. Detailed explanation of the principles of operation and construction of the instruments used is beyond the scope of this Guide.

 

The potential and actual effects of bond voids on the performance and reliability of fabricated devices are beyond the scope of this Guide.

 

The scope of this study does not extend to recommendations as to which techniques may be less or more appropriate for particular manufacturing processes, and no such recommendations are provided herein.

 

Referenced SEMI Standards

SEMI 3D4 — Guide for Metrology for Measuring Thickness, Total Thickness Variation (TTV), Warp/Sori, and Flatness of Bonded Wafer Stacks
SEMI M1 — Specifications for Polished Single Crystal Silicon Wafers
SEMI AUX032 — Report on Round Robin Experiment on Bond Void Measurement

Member Price: $113.00
Regular price Non-Member Price: $150.00