SEMI 3D15 - Guide for Overlay Performance Assessment for 3DS-IC Process

Volume(s): 3D-IC
Language: English
Type: Single Standards Download (.pdf)

This Standard was technically approved by the 3DS-IC Global Technical Committee. This edition was approved for publication by the global Audits and Reviews Subcommittee on December 4, 2015. Available at and in March 2016.


This Guide will assist the user in conducting the overlay performance assessment for the face to back (F2B) and face to face (F2F) wafer in 3DS-IC process. A generic overlay performance assessment specification will be addressed in order to provide criteria and common baselines of the middle-end process for related upstream and downstream manufacturers fabricating the 3DS-IC products.


This Guide will provide a generic optical measurement methodology and linear dimensional parameters such as translation, expansion, rotation, residue errors and vector plots for overlay performance assessment in 3D-IC middle end process quality control. It includes generic overlay target design methodology, instrument configuration, theoretical model and measurement algorithm consideration for F2F and F2B wafer in 3D-IS process. It focuses on the various measurement methods available, rather than on particular instruments. This Guide does not provide an exhaustive list of the state of the art of overlay methodology of 3D-IC process.


Referenced SEMI Standards

SEMI 3D7 — Guide for Alignment Mark for 3DS-IC Process
SEMI P18 — Specification for Overlay Capabilities of Wafer Steppers
SEMI P28 — Specification for Overlay-Metrology Test Patterns for Integrated-Circuit Manufacture

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