SEMI E129 - Guide to Assess and Control Electrostatic Charge in a Semiconductor Manufacturing Facility
This Standard was technically approved by the global Metrics Technical Committee. This edition was approved for publication by the global Audits and Reviews Subcommittee on August 30, 2012. Available at www.semiviews.org and www.semi.org in September 2012; originally published November 2003; previously published July 2009.
The purpose of this Document is to minimize the negative impact on productivity caused by static charge and electric fields in semiconductor manufacturing environments. It is a guide for establishing electrostatic compatibility in facilities used for semiconductor manufacturing. Electrostatic compatibility of production equipment is addressed in SEMI E78.
Electrostatic surface charge causes a number of undesirable effects in semiconductor manufacturing environments. Electrostatic discharge (ESD) damages both products and reticles. ESD events also cause electromagnetic interference (EMI), resulting in equipment malfunctions. Charged wafer and reticle surfaces attract particles (electrostatic attraction or ESA) and increase the defect rate. Charge on products can also result in equipment malfunction or product breakage. Operating problems and additional product defects due to static charge can have a negative impact on the cost of ownership (COO) of semiconductor manufacturing equipment (refer to SEMI E35).
Static control methods can be incorporated in the factory design to reduce static charge to acceptable levels. This Document can be used as a guide by semiconductor manufacturers and cleanroom facilities designers during the design of their facilities. Producers of the silicon wafers and reticles used in semiconductor manufacturing will also find it useful. The test methods described can be used to demonstrate the effectiveness of the static control methods. The end user will be able to use these test methods to verify compliance with a facility design specification after the facility is built or after design changes have been made, and to verify ongoing compliance as a part of factory maintenance procedures.
Semiconductor process technology will continue to move toward smaller product geometries. Acceptable static charge levels will decrease with product feature size. This Document will help to assure that facility static charge limits are appropriate for the product being manufactured, referencing the feature sizes contained in the International Technology Roadmap for Semiconductors (ITRS).
Referenced SEMI Standards
SEMI E33 — Specification for Semiconductor Manufacturing Facility Electromagnetic Compatibility
SEMI E35 — Guide to Calculate Cost of Ownership (COO) Metrics for Semiconductor Manufacturing Equipment
SEMI E43 — Recommended Practice for Electrostatic Measurements on Objects and Surfaces
SEMI E78 — Guide to Assess and Control Electrostatic Discharge (ESD) and Electrostatic Attraction (ESA) for Equipment