ESDA Savage on Security 2: Hardware Fuzzing: What? Why? How?
This webinar will describe the hardware vulnerabilities in hardware description languages, such as Verilog and VHDL, then cover a new and radical approach called hardware fuzzing to find these vulnerabilities
CANCELLATION POLICY:
This is an online recorded event. If you cannot attend the live event, you will receive the content recording following the event. We are not processing refunds or cancellations.
EVENT CONTACT:
Paul Cohen
Email: pcohen@semi.org
ESDA Savage on Security 2: Hardware Fuzzing: What? Why? How?
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