SEMI M55 - Specification for Polished Monocrystalline Silicon Carbide Wafers
This Standard was technically approved by the Compound Semiconductor Materials Global Technical Committee. This edition was approved for publication by the global Audits and Reviews Subcommittee on May 16, 2017. Available at www.semiviews.org and www.semi.org in August 2017; originally published March 2003; previously published March 2015.
NOTICE: This Document was completely rewritten in 2016 to combine SEMI M55 and its Subordinate Documents, SEMI M55.1, SEMI M55.3, and SEMI M55.4, into one Document.
These specifications cover substrate requirements for monocrystalline high-purity silicon carbide wafers of crystallographic polytype 6H and 4H used in semiconductor and electronic device manufacturing.
A complete purchase specification may require the defining of additional physical, electrical, and bulk properties. These properties are listed, together with test methods suitable for determining their magnitude where such procedures are documented.
These specifications are directed specifically to silicon carbide wafers with one or both sides polished. Unpolished wafers or wafers with epitaxial films are not covered; however, purchasers of such wafers may find these specifications helpful in defining their requirements.
The material is Single Crystal Silicon Carbide (SiC) existing in many crystallographically different polytypes. For the most common polytypes the following properties in Table A1-1 are listed for use as guidelines.
This Standard addresses three main application areas for SiC substrates:
- High power applications (in this Document referred to as ‘HP’) employing homoepitaxy on conductive substrates
- High frequency applications (in this Document referred to as ‘HF’) employing heteroepitaxy on semi-insulating substrates
- Opto-electronic application (in this Document referred to as ‘OP’) employing heteroepitaxy on conductive substrates
For reference purposes, SI (System International, commonly called metric) units shall be used.
Dimensional requirements are provided for the following categories of polished wafers:
- 50.8 mm Round Polished Monocrystalline 4H and 6H Silicon Carbide Wafers
- 76.2 mm Round Polished Monocrystalline 4H and 6H Silicon Carbide Wafers
- 100.0 mm Round Polished Monocrystalline 4H and 6H Silicon Carbide Wafers
- 150.0 mm Round Polished Monocrystalline 4H and 6H Silicon Carbide Wafers
Referenced SEMI Standards
SEMI M1 — Specification for Polished Single Crystal Silicon Wafers
SEMI M59 — Terminology for Silicon Technology
SEMI M81 — Guide to Defects Found on Monocrystalline Silicon Carbide Substrates
SEMI M83 — Test Method for Determination of Dislocation Etch Pit Density in Monocrystals of III-V Compound Semiconductors
SEMI M87 — Test Method for Contactless Resistivity Measurement of Semi-Insulating Semiconductors
SEMI MF26 — Test Method for Determining the Orientation of a Semiconductive Single Crystal
SEMI MF154 — Guide for Identification of Structures and Contaminants Seen on Specular Silicon Surfaces
SEMI MF523 — Practice for Unaided Visual Inspection of Polished Silicon Wafer Surfaces
SEMI MF533 — Test Method for Thickness and Thickness Variation of Silicon Wafers
SEMI MF671 — Test Method for Measuring Flat Length on Wafers of Silicon and Other Electronic Materials
SEMI MF673 — Test Method for Measuring Resistivity of Semiconductor Wafers or Sheet Resistance of Semiconductor Films with a Noncontact Eddy-Current Gauge
SEMI MF847 — Test Method for Measuring Crystallographic Orientation of Flats on Single Crystal Silicon Wafers by X-Ray Techniques
SEMI MF928 — Test Method for Edge Contour of Circular Semiconductor Wafers and Rigid Disk Substrates
SEMI MF1390 — Test Method for Measuring Bow and Warp on Silicon Wafers by Automated Noncontact Scanning
SEMI MF1530 — Test Method for Measuring Flatness, Thickness, and Total Thickness Variation on Silicon Wafer by Automated Noncontact Scanning
SEMI MF2074 — Guide for Measuring Diameter of Silicon and Other Semiconductor Wafers
SEMI T5 — Specification for Alphanumeric Marking of Round Compound Semiconductor Wafers
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