SEMI M67 - Test Method for Determining Wafer Near-Edge Geometry from a Measured Thickness Data Array Using the ESFQR, ESFQD, and ESBIR Metrics

Volume(s): Materials
Language: English
Type: Single Standards Download (.pdf)
Abstract

This Standard was technically approved by the Silicon Wafer Global Technical Committee. This edition was approved for publication by the global Audits and Reviews Subcommittee on August 31, 2015. Available at www.semiviews.org and www.semi.org in October 2015; originally published November 2006; previously published November 2009.

 

Wafer near-edge geometry can significantly affect the yield of semiconductor device processing.

 

Knowledge of near-edge geometrical properties can help the producer and consumer determine if the dimensional characteristics of a wafer satisfy given geometrical requirements.

 

This Test Method is suitable for quantifying the flatness aspects of near-edge geometry of wafers used in semiconductor device processing.

 

The ESFQR, ESFQD or ESBIR metric may be more suitable for quantifying the flatness aspects of near-edge geometry than traditional metrics such as SFQR, SFQD or SBIR. ESFQR, ESFQD and ESBIR quantify near-edge geometry fully and consistently at all angular positions on the wafer edge except at locations intentionally excluded. SFQR, SFQD and SBIR, on the other hand treat different angular positions differently and do not typically provide full coverage of the wafer edge.

 

Consideration should be given to the use of near-edge geometry metrics as a process control tool rather than a material exchange specification.

 

There are other metrics for near-edge geometry, some of which quantify other aspects such as ZDD, ROA and PSFQR.

 

This Test Method covers calculation of the near-edge geometry metrics ESFQR, ESFQD and ESBIR.

 

The metrics calculated by this Test Method are based on a thickness data array. This array represents the front surface of the wafer when the back surface of the wafer is ideally flat, as when pulled down onto an ideally clean flat chuck.

 

This Test Method is suitable for polished, epitaxial, SOI, or other layer condition.

 

This Test Method is applicable to categories of wafers specified in SEMI M1 used in advanced IC manufacturing.

 

This Test Method does not cover acquisition of the thickness data array. However, it gives the required characteristics of the thickness data array.

 

Other metrics analogous to flatness metrics can be calculated, but these are outside the scope of this Test Method.

 

Deficiencies of data such as inadequate spatial resolution, mispositioning, noise, etc. in the thickness data array used to calculate the metrics may lead to erroneous results.

 

The calculations of this Test Method do not remove wafer shape and therefore are not applicable to data obtained from unclamped wafer single-surface data.

 

The reference plane used in the calculation is dependent on both the radial length and sector span.

 

Referenced SEMI Standards

SEMI M1 — Specifications for Polished Single Crystal Silicon Wafers
SEMI M20 — Practice for Establishing a Wafer Coordinate System
SEMI M59 — Terminology for Silicon Technology
SEMI M68 — Practice for Determining Wafer Near-Edge Geometry from a Measured Height Data Array Using a Curvature Metric, ZDD
SEMI M70 — Practice for Determining Wafer-Near-Edge Geometry Using Partial Wafer Site Flatness
SEMI M77 — Practice for Determining Wafer Near-Edge Geometry Using Roll-Off Amount, ROA
SEMI MF1530 — Test Method for Measuring Flatness, Thickness, and Total Thickness Variation on Silicon Wafers by Automated Noncontact Scanning

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