M07000 - SEMI M70 - Test Method for Determining Wafer-Near-Edge Geometry Using Partial Wafer Site Flatness

Volume(s): Materials
Language: English
Type: Single Standards Download (.pdf)
Abstract

This Standard was technically approved by the Silicon Wafer Global Technical Committee. This edition was approved for publication by the global Audits and Reviews Subcommittee on August 31, 2015. Available at www.semiviews.org and www.semi.org in October 2015; originally published March 2007; previously published November 2009.

 

Wafer near edge geometry can significantly affect the yield of semiconductor device processing.

 

Knowledge of near edge geometrical properties can help the producer and consumer to determine if the dimensional characteristics of a wafer satisfy given geometrical requirements.

 

This Test Method is suitable quantifying the near edge geometry of wafers used in semiconductor device processing.

 

The PSFQR or PSFQD metric is suitable for quantifying near edge geometry when applying a site pattern that appropriately covers large parts of the wafer edge.

 

Flatness metric is well-established therefore partial site flatness can be used as a process control tool as well as a material exchange specification for edge geometry.

 

There are other metrics; that is, ZDD, ESFQR, ROA, some of which quantify more specific aspects of edge geometry.

 

This Test Method covers calculation of the near edge geometry metrics PSFQR and PSFQD.

 

SFQR and SFQD are well known parameters and described in detailed in SEMI MF1530. In contrast to SEMI MF1530 the present Test Method is dealing exclusively with the non-full sites (i.e., the partial sites). The Test Method is focused only and specifically on near edge geometry applications.

 

The metrics calculated by this Test Method are based on a thickness data array (see also SEMI MF1530). This array represents the front surface of the wafer when the back surface of the wafer is ideally flat, as when pulled down onto an ideally clean flat chuck.

 

This Test Method is suitable for polished, epitaxial, SOI, or other layer condition.

 

The Test Method is applicable to categories of wafers specified in SEMI M1 used in advanced IC manufacturing.

 

This Test Method does not cover acquisition of the thickness data array. However, it gives the required characteristics of the thickness data array.

 

Referenced SEMI Standards

SEMI M1 — Specifications for Polished Single Crystal Silicon Wafers
SEMI M20 — Practice for Establishing a Wafer Coordinate System
SEMI M49 — Guide for Specifying Geometry Measurement Systems for Silicon Wafers for the 130 nm to 22 nm Technology Generations
SEMI M59 — Terminology for Silicon Technology
SEMI M67 — Test Method for Determining Wafer Near-Edge Geometry from a Measured Thickness Data Array Using the ESFQR and ESFQD Metrics
SEMI M68 — Test Method for Determining Wafer Near-Edge Geometry from a Measured Height Data Array Using a Curvature Metric, ZDD
SEMI M77 — Test Method for Determining Wafer Near-Edge Geometry Using Roll-Off Amount, ROA
SEMI MF1530 — Test Method for Measuring Flatness, Thickness, and Total Thickness Variation on Silicon Wafers by Automated Noncontact Scanning

Related Products
Interested in purchasing additional SEMI Standards?

Consider SEMIViews, an online portal with access to over 1000 Standards.

Refund Policy: Due to the nature of our products, SEMI has a no refund/no exchange policy. Please make sure that you have reviewed your order prior to finalizing your purchase. All sales are final.

Member Price: $113.00
Regular price Non-Member Price: $150.00