SEMI M71 - Specification for Silicon-on-Insulator (SOI) Wafers for CMOS LSI -

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Volume(s): Materials
Language: English
Type: Single Standards Download (.pdf)
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Revision: SEMI M71-0120 (Reapproved 0425) - Current

Revision

Abstract

 

1  Purpose
1.1  This Specification defines thin-layer silicon-on-insulator (SOI) wafer requirements for CMOS large-scale integrated circuit (LSI) devices. In the case of 200 and 300 mm wafers this Specification is targeted for nodes from 130 to 14 nm. In the case of 150 mm wafers, older LSI generations are included as well. By defining parameters, inspection procedures and acceptance criteria, both suppliers and customers may uniformly define product characteristics and quality requirement.
2  Scope
2.1  This Specification covers SOI wafers manufactured by both Separation by Implantation of Oxygen (SIMOX) or wafer bonding for layer transfer. It defines the properties of SOI wafers that are meant for use in LSI CMOS applications. It specifies the general characteristics of 200 and 300 mm notched SOI wafers. It facilitates selection of customer-driven parameters for 300 mm wafers with the Si film thickness from 8 to 300 nm, and for 200 mm wafers with the Si film thickness from 20 to 300 nm. Furthermore, this Specification also covers 150 mm wafers that typically have a flat instead of a notch. This Specification is intended to be used with the polished wafer specification (SEMI M1). In the case when epitaxial layers are used in fabrication of SOI wafers, the epitaxial wafer specification (SEMI M62), which defines the properties of the epitaxial layer, should also be utilized.

 

Referenced SEMI Standards (purchase separately)
SEMI 3D4 — Guide for Metrology for Measuring Thickness, Total Thickness Variation (TTV), Bow, Warp/Sori, and Flatness of Bonded Wafer Stacks
SEMI 3D13 — Guide for Measuring Voids in Bonded Wafer Stacks
SEMI M1 — Specification for Polished Single Crystal Silicon Wafers
SEMI M20 — Practice for Establishing a Wafer Coordinate System
SEMI M35 — Guide for Developing Specifications for Silicon Wafer Surface Features Detected by Automated Inspection
SEMI M41 — Specification of Silicon-on-Insulator (SOI) for Power Device/ICs
SEMI M62 — Specification for Silicon Epitaxial Wafers
SEMI MF26 — Test Method for Determining the Orientation of a Semiconductive Single Crystal
SEMI MF42 — Test Method for Conductivity Type of Extrinsic Semiconducting Materials
SEMI MF81 — Test Method for Measuring Radial Resistivity Variation on Silicon Wafers
SEMI MF84 — Test Method for Measuring Resistivity of Silicon Wafers with an In-Line Four-Point Probe
SEMI MF523 — Practice for Unaided Visual Inspection of Polished Silicon Wafer Surfaces
SEMI MF847 — Test Method for Measuring Crystallographic Orientation of Flats on Single Crystal Silicon Wafers by X-Ray Techniques
SEMI MF1152 — Test Method for Dimensions of Notches on Silicon Wafers
SEMI MF1188 — Test Method for Interstitial Oxygen Content of Silicon by Infrared Absorption with Short Baseline
SEMI MF1390 — Test Method for Measuring Warp on Silicon Wafers by Automated Noncontact Scanning
SEMI MF1809 — Guide for Selection and Use of Etching Solutions to Delineate Structural Defects in Silicon

 

Revision History
SEMI M71-0120 (Reapproved 0425)
SEMI M71-0912 (technical revision)
SEMI M71-0310 (technical revision)
SEMI M71-1107 (technical revision)
SEMI M71-0707 (first published)

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