SEMI M71 - Specification for Silicon-on-Insulator (SOI) Wafers for CMOS LSI -

Abstract

This Specification defines thin-layer silicon-on-insulator (SOI) wafer requirements for CMOS large-scale integrated circuit (LSI) devices. In the case of 200 and 300 mm wafers this Specification is targeted for the 130 nm technology node and beyond (65, 45, 32, 22 nm, etc.). In the case of 150 mm wafers, older LSI generations are included as well. By defining parameters, inspection procedures and acceptance criteria, both suppliers and customers may uniformly define product characteristics and quality requirement.

SEMI M1 — Specifications for Polished Single Crystal Silicon Wafers
SEMI M20 — Practice for Establishing a Wafer Coordinate System
SEMI M35 — Guide for Developing Specifications for Silicon Wafer Surface Features Detected by Automated Inspection
SEMI M41 — Specification of Silicon-on-Insulator (SOI) for Power Device/ICs
SEMI M59 — Terminology for Silicon Technology
SEMI M62 — Specification for Silicon Epitaxial Wafers
SEMI MF26 — Test Methods for Determining the Orientation of a Semiconductive Single Crystal
SEMI MF42 — Test Methods for Conductivity Type of Extrinsic Semiconducting Materials
SEMI MF81 — Test Method for Measuring Radial Resistivity Variation on Silicon Wafers
SEMI MF84 — Test Method for Measuring Resistivity of Silicon Wafers with an In-Line Four-Point Probe
SEMI MF523 — Practice for Unaided Visual Inspection of Polished Silicon Wafer Surfaces
SEMI MF847 — Test Method for Measuring Crystallographic Orientation of Flats on Single Crystal Silicon Wafers by X-Ray Techniques
SEMI MF1152 — Test Method for Dimensions of Notches on Silicon Wafers
SEMI MF1188 — Test Method for Interstitial Oxygen Content of Silicon by Infrared Absorption With Short Baseline
SEMI MF1390 — Test Method for Measuring Warp on Silicon Wafers by Automated Non-Contact Scanning
SEMI MF1809 — Guide for Selection and Use of Etching Solutions to Delineate Structural Defects in Silicon

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