SEMI P23 - Guidelines for Programmed Defect Masks and Benchmark Procedures for Sensitivity Analysis of Mask Defect Inspection Systems -

Abstract

This standard was technically approved by the global Micropatterning Committee. This edition was approved for publication by the global Audits and Reviews Subcommittee on September 5, 2007. It was available at www.semi.org in October 2007. Originally published in 1993; previously published in February 2000.

 

NOTICE: This Standard or Safety Guideline has an Inactive Status because the conditions to maintain Current Status have not been met. Inactive Standards or Safety Guidelines are available from SEMI and continue to be valid for use.

　

The purpose of this guideline is to propose a test mask to be used for evaluation of the sensitivity of Mask Defect Inspection Systems. This test mask consists of test chips including programmed pattern defects and reference test chips without programmed defects. Since the test chip is an assembly of cells, the test chips are defined in this guideline by cell patterns, programmed defects in cell patterns, and the layout of the cells. Also, the test mask is defined by defining the test chips arrangement. Furthermore, the use of this mask is described. It is desirable that these test masks and benchmark procedures be used when the sensitivity of a Mask Defect Inspection System is evaluated.

　

This guideline defines the content and methods for use of test masks used in the evaluation of mask defect inspection systems. Although it is possible to use this test mask to evaluate transcription of defects etc., this standard does not attempt to define these processes.

　

This guideline shall be revised when a new effective measurement technology for defect sizing becomes commonly available in the market.

　

Referenced SEMI Standards

SEMI P1 — Specification for Hard Surface Photomask Substrates
SEMI P22 — Guideline for Photomask Defect Classification and Size Definition
SEMI P33 — Provisional Specification for Developmental 230 mm Square Hard Surface Photomask Substrates

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