SEMI P28 - Specification for Overlay-Metrology Test Patterns for Integrated-Circuit Manufacture

Volume(s): Microlithography
Language: English
Type: Single Standards Download (.pdf)
Abstract

This standard was technically approved by the global Micropatterning Committee. This edition was approved for publication by the global Audits and Reviews Subcommittee on April 25, 2007. It was available at www.semi.org in June 2007. Originally published in 1996.

 

NOTICE: This Standard or Safety Guideline has an Inactive Status because the conditions to maintain Current Status have not been met. Inactive Standards or Safety Guidelines are available from SEMI and continue to be valid for use.

 

This document defines several standard overlay-metrology patterns that are used by metrology equipment users to evaluate and test micropatterning equipment and processes in integrated circuit (IC) manufacturing. These overlay cells may be placed by optional patterning methods onto substrates during the manufacturing process. Usage of the standard overlay patterns is an attempt to provide consistent industrywide use of automated metrology equipment.

 

This specification defines general designs that describe the shape, size, design rules, and placement considerations (where appropriate) of several basic patterns for overlay metrology. These standard test patterns can be used for optical, scanning electron beam, and other types of metrology.

 

Referenced SEMI Standards

SEMI P6 — Specification for Registration Marks for Photomasks
SEMI P18 — Specification for Overlay Capabilities of Wafer Steppers
SEMI P19 — Specification for Metrology Pattern Cells for Integrated Circuit Manufacture

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