Packaging Basics US & EU 6/16/2025

Packaging Basics

Dates & Times

June 16^th – June 17^th, 2025

8:00 – 12:00 PT

Location

Virtual

Pricing

Members: $599

Non-Members: $649

Students/Vets: $549

Semiconductor Packaging Basics is a 2-day course that offers detailed instruction on the basic technologies and issues associated with today’s semiconductor packages. We place special emphasis on mainstream package technology issues like bump processes, wire bonding, mold injection, and other processes for package manufacturing.

Semiconductor and integrated circuit developments continue to proceed at an incredible pace. For example, today’s microprocessor chips have one thousand times the processing power of those a decade ago. These challenges have been accomplished because of the integrated circuit industry’s ability to track something known as Moore’s Law. Moore’s Law states that an integrated circuit’s processing power will double every two years. To accomplish this, the industry is also driving prices down. This has created several challenges related to the packaging of these components. 

By focusing on mainstream issues in packaging technology, participants will learn why advances in the industry are occurring along certain lines and not others. Our instructors work hard to explain semiconductor packaging without delving heavily into the complex physics and materials science that normally accompany this discipline.

This skill-building series is divided into four segments:

1. Packaging Technology Overview
2. Current Issues
3. Reliability
4. Future Semiconductor Packages
    

Learning Objectives:

• Understand semiconductor packaging technology and its technical issues.
• Analyze the issues behind packaging technology and why we are facing certain predicaments. 
• Identify the key issues related to the continued growth of the semiconductor industry.
• Understand how package reliability, power consumption and device performance are interrelated. 
• Make decisions about how to construct and evaluate new packaging designs and technologies. 
• Describe polymers, solders, and a host of materials that are being considered for advanced packaging.

Who should Attend:

This course is a must for every manager, engineer, and technician working in semiconductor packaging, using semiconductor components or supplying tools to the industry.

Course Topics:

• Packaging Trends
• Global Business Trends
• Technology Trends and Implications for Packaging
• International Technology Roadmap for Semiconductors: What it is and What it Says About Packaging
• Package Types
• Traditional Packages (DIP, QFP, QFN, BGA, SOP, SOIC, others)
• Scaling (Shrinks and Thinned Packages)
• Wafer Chip Scale Packages
• System in Package
• Stacked (3D) Packages
• Major Unit Processes
• Wafer Dicing
• Lead frames
• Dies Mount
• Wire Bonding
• Ball Drop
• Mold Encapsulation
• Singulation
• Packing and Shipping
• WLCSP Processes
• Redistribution Layers
• Solder Bumping
• Copper Pillar Bumping
• Process Flows
• Advanced Processes
• Wafer Thinning
• Through Silicon Vias
• Packaging and Performance
• Electrical
• Thermal
• Mechanical
• Future Trends