SEMI PV40 - Test Method for In-Line Measurement of Saw Marks on PV Silicon Wafers by a Light Sectioning Technique Using Multiple Line Segments
This Standard was technically approved by the Photovoltaic – Materials Global Technical Committee. This edition was approved for publication by the global Audits and Reviews Subcommittee on May 1, 2013. Available at www.semiviews.org and www.semi.org in May 2013; originally published September 2012.
Silicon (Si) wafers for PV applications cut from a Si ingot or Si brick contain a variety of micro- and macroscopic crystallographic defects and flaws that may impact the efficiency of a solar cells or the yield of a manufacturing line.
Theses defects can be categorized by their origin, either as grown-in defects that are generated during the solidification of the Si ingot or as process induced defects that are generated by abrasive processes during manufacturing of the wafers.
The grown-in defects consist of point defects (impurities, vacancies, self-interstitials and their complexes), dislocations, grain boundaries, and precipitates/inclusions.
The process induced defects consist of chips/indents (surface and edge) and cracks (not to mention the surface itself).
Inclusions, chips and cracks are detrimental for solar cell processing as they may enhance stress in the wafer bulk and the region surrounding them and trigger the breakage of a wafer.
Characteristic parameters of these defects are part of wafer specifications (SEMI PV22), such as number per wafer, maximum length or size. Standardized test methods for measuring them are required to avoid disagreement between business partners regarding wafer quality and specification.
This Standard defines a test method for reproducibly detecting and characterizing cracks and distinguishing them from other defects.
This Test Method characterizes cracks in single or multicrystalline Si wafers.
It covers an in-line, noncontacting and nondestructive method that determines the number of cracks per wafer and crack length of clean, dry as-cut Si wafers that are supported by two belts that move the test specimen through the measurement equipment.
This Test Method covers square and pseudo-square PV Si wafers, with a nominal edge length ≥125 mm and a thickness ≥100 µm.
Because this Test Method is intended for in-line high throughput measurements it is mandatory to operate the measurement system under a tight SPC (e.g., ISO 11462) for obtaining reliable, repeatable and reproducible measurement data.
Referenced SEMI Standards
SEMI E89 –– Guide for Measurement System Analysis (MSA)
SEMI M59 –– Terminology for Silicon Technology
SEMI MF1569 –– Guide for Generation of Consensus Reference Materials for Semiconductor Technology