SEMI111 Introduction to Hybrid Bonding for Advanced Packaging

Course Description 

This course will discuss the meaning and the need for advanced packaging such as Chiplets, and 3D Stacked Systems, with a deep dive into Hybrid Bonding For many generations of technology nodes, Moore's Law has reliably delivered the doubling of transistor density every 1.5 to 2 years while bringing down the cost per transistor. However, in recent advanced nodes, Moore's Law has slowed down the cost of advanced nodes causing chips to increase.

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To keep up with performance demands, manufacturers have continued to increase chip size to have large System on Chip (SoCs) causing chip sizes to reach the lithographic reticle limits. Moreover, increasing chip size beyond reticle limits also decreases chip yields and contributes to increasing the cost of manufacturing, thus increasing chip sizes beyond reticle limits.

The semiconductor industry needs to be on the path to deliver more performance and functionality at reasonable prices despite the slowing of Moore's Law.

One popular approach the industry is adopting to deliver is focusing on Advanced Packaging, including the use of Chiplets, Hybrid Bonding, and state-of-the-art 3D Stack Systems. This course will discuss the meaning and need for Advanced Packaging and dive into each one of these Advanced Packaging approaches. 

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​Course Objectives

• Recognize the need for Advanced Packaging
• Identify the types of Advanced Packaging
• Explain 3D Bonding and the basics of Hybrid Bonding for Advanced Packaging
• Identify the types of Hybrid Bonding, the current status, and the challenges 
• Discuss future opportunities in Hybrid Bonding

Course Duration

95 minutes

Target Audience 

Managers, supervisors, engineers, technicians, or any individual working directly with this equipment or product  

Requisite Knowledge 

None