Semiconductor Packaging Fundamentals & Advances US/EU 3/9

Member Price:  $149.00
Non-Member Price:  $199.00
Semiconductor Packaging Fundamentals & Advances
 
Dates & Times
March 9th, 2027 
Americas/EU 
8:00 am - 12:00 pm PDT
 
 
Location
Virtual Training
 
Pricing
 
Members:  $149
Non-Members:   $249
 
This four-hour workshop provides a comprehensive technical foundation in semiconductor packaging, bridging the gaps between front-end wafer fabrication and final system integration. 
 
In this course, we dive into the fundamental roles of packaging in enabling a complex product, namely, signal distribution, power delivery, thermal management, mechanical protection of the fragile silicon dies , and the risks associated with the manufacturing flow. We trace the evolution of packaging technology from wire-bonded leadframe packages through flip-chip and ball grid arrays to today's advanced heterogeneous integration platforms, including 2.5D interposers, 3D die stacking, fan-out wafer level packaging, and chiplet-based architectures. 
 
Given the complicated, and expensive, nature of these semiconductor packages, quality and reliability are a central theme for such complex products. We will discuss quality metrology used to maintain outgoing product quality and accelerated testing methods used to predict field performance using physics of failure methodology.   
 
The course concludes by presenting information on current and emerging technologies and the attendant challenges, which include hybrid bonding, co-packaged optics, and advanced substrate materials. The course also touches upon challenges with thermal dissipation for high-power AI products, and the bottlenecks now shaping next-generation semiconductor package roadmaps. 
 

Learning Objectives:

  • Define core packaging functions (signal, power, thermal, and mechanical.)
  • Trace the evolution from leadframes to 2.5D/3D and chiplet architectures.
  • Explain the “More than Moore” shift from transistor to package innovation. 
  • Identify key failure mechanisms like electromigration and thermal fatigue.
  • Apply quality metrology and screening methods to ensure outgoing product standards. 
  • Use accelerated testing and physics-of-failure models to predict long-term package reliability.
  • Evaluate emerging trends in hybrid bonding and co-package optics.
  • Hands-on exercises

Who Should Attend:

This course is ideal for anyone seeking a better understanding of semiconductor packaging fundamentals, challenges, and latest technologies.
 
Cancellation and Rescheduling Policies   
·         Registrants may cancel or reschedule a class no less than 30 days before the class start date. 
·       Cancellations received after the stated deadline will not be eligible for a refund.
·       Cancellations will be accepted via email to semiu-support@semi.org
·        The registrant or the credit card holder must make all refund requests.
·       Refund requests must include the attendee's name, Course Name, and session date.     
·       Refunds will be credited to the original payment method used for payment.
·       SEMI reserves the right to cancel any course due to low enrollment or other circumstances that would make the event unavailable 7 business days before the class's start date.
·       If SEMI cancels a class, the registrants will be offered a full refund. 

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