SOI Training Oct 21 - 22

The SOI Industry Consortium and SEMI University are offering three unique technical training sessions on designing Silicon-on-Insulator (SOI) wafers. Ground your knowledge in technical training on definitions, design principles, design flows, sample architectures, and new practices and solutions. Understand the manufacturing requirements and performance characteristics of SOI with a wealth of knowledge from academics and SMEs over the 1.5 days of training. 

                                                                     Location: SEMI HQ, Milpitas, CA

                                                                  Dates: October 21st - 22nd, 2025     

There will be 3 sessions.

1. Digital Edge AI on SOI (4 hours) Day 1 -  8:00 am - 12 pm

1. Analog Design Techniques on FD-SOI (4 hours) Day 1 - 1:00 pm - 5:00 pm

1. RF mm Wave on SOI (4 hours) Day 2 8:00 am - 12 pm