SEMI T23 - Specification for Single Device Traceability for the Supply Chain
This Standard was technically approved by the Traceability Global Technical Committee. This edition was approved for publication by the global Audits and Reviews Subcommittee on December 17, 2018. Available at www.semiviews.org and www.semi.org in January 2019.
Device-level identification (device ID), implemented in individual die/designs, has been traditionally used by the silicon designers and manufacturers to trace die through the silicon manufacturing flow to aid the enhancement of silicon fab yields. An additional benefit of this identification (ID) is to be able to trace individual die and packaged parts through their final application testing in the final product before shipping to a customer. The ID can also be used to trace parts that subsequently fail in the field.
The recent evolution of data analytics is now allowing, via the device ID, end to end data analysis of single dies’ performances from initial wafer test to the product level test and field performance. Analysis of a device’s data in its native mode compared to its initial wafer or package (final test) testing data, now allows further in-depth yield learning. Silicon device fail data from failing die during the product manufacturing test (that forms the device’s defective parts per million [DPPM]), can be correlated back to the wafer and final test manufacturing test data to find new issues, for example, silicon test coverage gaps and systematic and random defects found only during product level or system level test. Adding device ID to a component provides an extended opportunity to improve product quality and reduce DPPMs. Further, if a field recall is needed, individual faulty parts can be traced, thus greatly reducing the size of a recall, where all parts may have to be recalled if no device ID were present.
Device designers, manufacturers and suppliers that do not implement device IDs in their devices will be missing out on this opportunity to reduce DPPM. Many applications, like networking, medical and automotive are requiring the lowest possible DPPMs (trending to zero). Device ID for end to end traceability is one way to enable this continued quest for highest quality.
This Document establishes a standardized approach for enabling traceable device ID throughout the IC manufacturing, test, and assembly processes to the point of use in the final system. Suppliers and board-level manufacturers can use this unique identifier to communicate about a specific device for the purposes of performance or failure analysis. The unique identifier will enable the ability to send manufacturing data back and forward through the supply chain to perform data analysis.
This Standard provides a model focusing on the minimum of key concepts, behaviors, and requirements for enabling device ID and traceability. This Standard is intended for implementation by materials suppliers, device designers, device makers, board manufacturers, and system integrators from various industry sectors such as semiconductor, automotive, and medical. This Standard applies to different device configurations ranging from single integrated circuits to multi-chip/3D structures. This Standard can be adapted for use with a range of technologies, ranging from legacy systems to the latest in electronic chip identification (ECID) and 2D code package marking. This Standard defines, at a high level, the minimum requirements for device ID and traceability for new design and manufacturing implementation as well as for backwards compatibility with existing methods.
Referenced SEMI Standards
SEMI E142 — Specification for Substrate Mapping
SEMI T7 — Specification for Back Surface Marking of Double-Side Polished Wafers with a Two-Dimensional Matrix Code Symbol
SEMI T9 — Specification for Marking of Metal Lead-Frame Strips with a Two-Dimensional Data Matrix Code Symbol
SEMI T19 — Specification for Device Marking